Name
Title | ||
|---|---|---|
A 3.2-to-4.6 GHz fast-settling all-digital PLL with feed forward frequency presetting. |
Year | Venue | Field |
|---|---|---|
2017 | IEICE Electronic Express | Settling,Phase-locked loop,Computer science,Electronic engineering,Feed forward |
DocType | Volume | Issue |
Journal | 14 | 2 |
Citations | PageRank | References |
1 | 0.40 | 8 |
Authors | ||
10 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tao Yang | 1 | 160 | 76.32 |
| Sichen Yu | 2 | 1 | 0.73 |
| Huixiang Han | 3 | 1 | 0.73 |
| Xiaolu Liu | 4 | 1 | 1.07 |
| Dashan Pan | 5 | 1 | 1.07 |
| Xi Tan | 6 | 73 | 14.27 |
| Yan Na | 7 | 12 | 9.20 |
| Fan Ye | 8 | 34 | 21.14 |
| Junyu Wang | 9 | 25 | 6.88 |
| Hao Min | 10 | 26 | 9.26 |