Name
Title | ||
|---|---|---|
A 2.4-GHz all-digital phase-locked loop with a pipeline-ΔΣ time-to-digital converter. |
Year | Venue | Field |
|---|---|---|
2017 | IEICE Electronic Express | Phase-locked loop,Computer science,Electronic engineering,Noise shaping,Time-to-digital converter |
DocType | Volume | Issue |
Journal | 14 | 6 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Zixuan Wang | 1 | 9 | 12.65 |
| Shanwen Hu | 2 | 0 | 0.68 |
| Zhikuang Cai | 3 | 3 | 5.54 |
| Bo Zhou | 4 | 58 | 11.39 |
| Xincun Ji | 5 | 10 | 7.70 |
| Rong Wang | 6 | 23 | 12.43 |
| Yu-feng Guo | 7 | 3 | 3.82 |