Name
Abstract | ||
|---|---|---|
Local mean decomposition (LMD) is an effective signal analysis method for analyzing nonlinear and nonstationary signals. LMD has been usefully applied in a wide variety of applications. However, achieving real-time LMD calculations in software is difficult. In this paper, a flexible, low-cost, and high-performance hardware architecture for LMD is proposed that satisfies the real-time requirements of various LMD applications. All proposed circuits were developed using Verilog and then synthesized using the Synopsys Design Compiler with the Taiwan Semiconductor Manufacturing Company 0.18-mu m cell library. With the help of parameterization, the proposed LMD circuit can easily be used for various applications and hardware architectures. |
Year | Venue | Keywords |
|---|---|---|
2017 | JOURNAL OF INFORMATION SCIENCE AND ENGINEERING | hardware,local mean decomposition (LMD),real-time,signal processing,demodulation |
Field | DocType | Volume |
Computer science,Computational science,Distributed computing | Journal | 33 |
Issue | ISSN | Citations |
1 | 1016-2364 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pei-Yin Chen | 1 | 314 | 38.47 |
| Yen-Chen Lai | 2 | 2 | 1.07 |
| Ping-Hsuan Lai | 3 | 0 | 0.68 |