Name
Title | ||
|---|---|---|
A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface. |
Abstract | ||
|---|---|---|
This paper describes a 5.8 Gb/s adaptive integrating duobinary decision-feedback equalizer (DFE) for use in next-generation multi-drop memory interface. The proposed receiver combines traditional interface techniques like the integrated signaling and the duobinary signaling, in which the duobinary signal is generated by current integration in the receiver. It can address issues such as input data ... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/JSSC.2017.2675923 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Decision feedback equalizers,Receivers,Boosting,Timing,Bandwidth,Decoding | Memory interface,Equalization (audio),Bathtub curve,Computer science,Communication channel,Electronic engineering,Bandwidth (signal processing),Boosting (machine learning),Decoding methods,Bit error rate | Journal |
Volume | Issue | ISSN |
52 | 6 | 0018-9200 |
Citations | PageRank | References |
2 | 0.39 | 9 |
Authors | ||
10 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hyun-Wook Lim | 1 | 4 | 0.86 |
| Sung-Won Choi | 2 | 10 | 2.81 |
| Jeong-Keun Ahn | 3 | 2 | 0.73 |
| Woong-Ki Min | 4 | 2 | 0.39 |
| Sang-Kyu Lee | 5 | 4 | 0.86 |
| Chang-Hoon Baek | 6 | 4 | 0.86 |
| Jae-Youl Lee | 7 | 29 | 7.11 |
| Gyoocheol Hwang | 8 | 34 | 8.51 |
| Young-Hyun Jun | 9 | 60 | 11.41 |
| Bai-Sun Kong | 10 | 153 | 31.93 |