Paper Info
Title
Latency-Aware Packet Processing on CPU-GPU Heterogeneous Systems.
Abstract
In response to the tremendous growth of the Internet, towards what we call the Internet of Things (IoT), there is a need to move from costly, high-time-to-market specific-purpose hardware to flexible, low-time-to-market general-purpose devices for packet processing. Among several such devices, GPUs have attracted attention in the past, mainly because the high computing demand of packet processing applications can, potentially, be satisfied by these throughput-oriented machines. However, another important aspect of such applications is the packet latency which, if not handled carefully, will overshadow the throughput benefits. Unfortunately, until now, this aspect has been mostly ignored. To address this issue, we propose a method that considers the variable bit rate of the traffic and, depending on the current rate, minimizes the latency, while meeting the rate demand. We propose a persistent kernel based software architecture to overcome the challenges inherent in GPU implementation like kernel invocation overhead, CPU-GPU communication and memory access overhead. We have chosen packet classification as the packet processing application to demonstrate our technique. Using the proposed approach, we are able to reduce the packet latency on average by a factor of 3.5, compared to the state-of-the-art solutions, without any packet drop.
Year
DOI
Venue
2017
10.1145/3061639.3062269
DAC
Field
DocType
ISSN
Packet analyzer,Computer science,Latency (engineering),Computer network,Electronic engineering,Real-time computing,Throughput,Fast packet switching,Network packet,Packet processing,Packet generator,Processing delay,Embedded system
Conference
0738-100X
Citations 
PageRank 
References 
0
0.34
8
Authors
6
Name
Order
Citations
PageRank
Arian Maghazeh1283.26
Unmesh D. Bordoloi213314.49
Usman Dastgeer300.34
Alexandru Andrei432419.06
P. Eles5979.89
ZEBO PENG62422183.67