Paper Info
Title
High-level synthesis of resource-shared microarchitectures from irregular complex C-code
Abstract
Many high-level synthesis (HLS) tools aim at the hardware translation of input programs with relatively short loop bodies, often with a very regular control flow. However, codes from domains such as control engineering and numerical simulation often have a considerably different structure with large loop bodies holding (tens of) thousands of individual operations. Compilation of such codes not only requires the sharing of hardware operators, but also the efficient storage and forwarding of many intermediate results. Both academic as well as industrial synthesis tools have great difficulty coping with such input programs. We present Nymble-RS, a C-to-hardware compiler optimized to translate such complex programs. When evaluated on codes for the domain of convex solvers, the generated accelerators reach clock frequencies of over 200 MHz (exceeding those achieved by a state-of-the-art industrial tool by more than 3×), and offer speed-ups of up to 5× over software executing on the 800 MHz Cortex-A9 CPUs used in typical reconfigurable system-on-chips.
Year
DOI
Venue
2016
10.1109/FPT.2016.7929518
2016 International Conference on Field-Programmable Technology (FPT)
Keywords
Field
DocType
high-level synthesis,resource-shared microarchitectures,irregular complex C-code,HLS,hardware translation,control flow,Nymble-RS,C-to-hardware compiler,convex solvers,reconfigurable system-on-chips
Computer simulation,Computer science,Parallel computing,Control flow,High-level synthesis,Field-programmable gate array,Compiler,Real-time computing,Software,Operator (computer programming),Multiplexing
Conference
ISBN
Citations 
PageRank 
978-1-5090-5603-3
0
0.34
References 
Authors
0
2
Name
Order
Citations
PageRank
Björn Liebig1273.38
Andreas Koch 000123110.33