Name
Abstract | ||
|---|---|---|
This paper describes architectural extensions for a dynamically scheduled processor, so that it can be used in three different operation modes, ranging from high-performance, to high-reliability. With minor hardware-extensions of the control path, the resources of the superscalar data-path can be used either for high-performance execution, fail-safe-operation, or fault-tolerant-operation. This makes the processor-architecture a very good candidate for applications with dynamically changing reliability requirements, e. g. for automotive applications. The paper reports the hardware-overhead for the extensions, and investigates the performance penalties introduced by the fail-safe and fault-tolerant mode. Furthermore, a comprehensive fault simulation was carried out in order to investigate the fault-coverage of the proposed approach. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/DDECS.2017.7934572 | 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) |
Keywords | Field | DocType |
hardware-based fault-handling,dynamically scheduled processors,control path,hardware-extensions,high-performance execution,fail-safe-operation,fault-tolerant-operation,processor-architecture,reliability requirements,hardware-overhead,performance penalties | Fault handling,Computer science,Real-time computing,Fault tolerance,Ranging,Transient analysis,Superscalar,Automotive industry,Embedded system | Conference |
ISSN | ISBN | Citations |
2334-3133 | 978-1-5386-0473-1 | 1 |
PageRank | References | Authors |
0.37 | 10 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Felix Mühlbauer | 1 | 22 | 4.36 |
| Lukas Schroder | 2 | 1 | 0.37 |
| Mario Schölzel | 3 | 42 | 11.27 |