Title
From online fault detection to fault management in Network-on-Chips: A ground-up approach
Abstract
Due to the ongoing miniaturization of silicon technology beyond the sub-micron domain and the trend of integrating ever more components on a single chip, the Network-on-Chip (NoC) paradigm has emerged to address the scalability and performance shortcomings of bus-based interconnects. As the feature size shrinks, the system gets much more susceptible to faults caused by wear-out and environmental effects. Thus, in order to increase the reliability, creates the need for having mechanisms embedded into such a system that could detect and manage the faults in run-time. In this paper, a ground-up approach from fault detection to fault management for such a NoC-based system on chip is proposed that utilizes both local fault management for fast reaction to faults and a global fault management mechanisms for triggering a large-scale reconfiguration of the NoC. Also, detailed description of strategies for fault detection, localization, classification and propagation to a global fault management unit are provided and methods for local fault management are elaborated.
Year
DOI
Venue
2017
10.1109/DDECS.2017.7934565
2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)
Keywords
Field
DocType
Fault Detection,Checkers,Fault Classification,Fault Localization,Fault management,Reconfiguration,Network-on-Chip
Stuck-at fault,Fault coverage,Computer science,Fault detection and isolation,Software fault tolerance,Fault management,Electronic engineering,Real-time computing,Fault (power engineering),Control reconfiguration,Fault indicator,Embedded system
Conference
ISSN
ISBN
Citations 
2334-3133
978-1-5386-0473-1
3
PageRank 
References 
Authors
0.39
21
11