Name
Abstract | ||
|---|---|---|
The verification of both hardware and embedded software has become an important subject over the last years. However, neither standalone verification approaches like simulation-based or emulation nor state-of-the-art formal verification approaches are able to co-verify hardware/software modules in complex SoCs. This work proposes a semiformal approach to formally verify software-controlled connections in an attempt to start closing the hardware/software formal co-verification gap. Currently, this architectural aspect is partially verified using simulation. This approach presented interesting results compared to formal verification and simulation methods. |
Year | Venue | Field |
|---|---|---|
2017 | ISVLSI | Functional verification,Software engineering,Intelligent verification,Computer science,Verification,Formal methods,High-level verification,Software verification and validation,Software verification,Formal verification,Embedded system |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
8 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tomas Grimm | 1 | 0 | 0.34 |
| Djones Lettnin | 2 | 39 | 7.68 |
| Hubner, Michael | 3 | 390 | 47.98 |