Name
Abstract | ||
|---|---|---|
This paper investigates the performance of the BCH encoder and decoder for different error-correcting capabilities. The focus is on BCH codes of length 255. The motivation for this research is a project where data symbols of this length are transmitted over an error-prone wireless channel. The paper presents a mathematical introduction into encoding for cyclic codes and decoding of the BCH code. The code was implemented in both software and hardware and the performance and cost of both implementations were measured for different code parameters. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/ISSPIT.2016.7886049 | 2016 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT) |
Keywords | Field | DocType |
BCH,forward error correction,FPGA,ASIC,performance | Wireless,Computer science,BCH code,Software,Artificial intelligence,Computer engineering,Codec,Computer vision,Berlekamp–Welch algorithm,Parallel computing,Encoder,Decoding methods,Encoding (memory) | Conference |
ISSN | ISBN | Citations |
2162-7843 | 978-1-5090-5845-7 | 0 |
PageRank | References | Authors |
0.34 | 6 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dejan Azinovic | 1 | 4 | 0.71 |
| Klaus Tittelbach-Helmrich | 2 | 43 | 7.35 |
| Zoran Stamenkovic | 3 | 51 | 12.08 |