Abstract | ||
---|---|---|
In this paper, a re-configurable 12/13/14-bit SAR ADC based on a 12-bit ADC core is presented. A novel residue-boosting algorithm is developed to increase the bit resolution of a SAR ADC up to 2 bits without significant additional area and power. In the 12-bit mode, the 65nm prototype shows both DNL and INL of about +/- 0.5 LSB at 4MSPS, and in 14-bit mode, DNL and INL are about +/- 1 LSB and +/- 2 LSB at 2MSPS. ENOB is 11.5 bit and 13 bit for 12-bit and 14-bit mode each. The area of the ADC is 0.085mm(2). |
Year | Venue | Keywords |
---|---|---|
2017 | 2017 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC) | SAR ADC, Residue Boosting |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
2 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Joonsung Park | 1 | 0 | 0.68 |
Krishnaswamy Nagaraj | 2 | 40 | 14.10 |
Mikel Ash | 3 | 0 | 0.34 |
Ajay Kumar | 4 | 1 | 0.92 |