Title
An energy-efficient deep learning processor with heterogeneous multi-core architecture for convolutional neural networks and recurrent neural networks
Abstract
An energy-efficient deep learning processor is proposed for convolutional neural networks (CNNs) and recurrent neural networks (RNNs) in mobile platforms. The 16mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip is fabricated using 65nm technology with 3 key features, 1) Reconfigurable heterogeneous architecture to support both CNNs and RNNs, 2) LUT-based reconfigurable multiplier optimized for dynamic fixed-point with the on-line adaptation, 3) Quantization table-based matrix multiplication to reduce off-chip memory access and remove duplicated multiplications. As a result, compared to the [2] and [3], this work shows 20× and 4.5× higher energy efficiency, respectively. Also, DNPU shows 6.5× higher energy efficiency compared to the [5].
Year
DOI
Venue
2017
10.1109/CoolChips.2017.7946376
2017 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)
Keywords
DocType
ISSN
deep learning,convolutional neural network,recurrent neural network,heterogeneous,LUT
Conference
2473-4683
ISBN
Citations 
PageRank 
978-1-5386-3829-3
0
0.34
References 
Authors
0
5
Name
Order
Citations
PageRank
Dongjoo Shin16711.02
Jinmook Lee2659.34
Jinsu Lee3237.89
Juhyoung Lee431.40
Hoi-Jun Yoo51574226.79