Name
Abstract | ||
|---|---|---|
In this paper, we propose a non-volatile stochastic computing (SC) scheme using voltage-controlled magnetic tunnel junction (VC-MTJ) and negative differential resistance (NDR). The proposed design includes a VC-MTJ based true stochastic bit stream generator and VC-MTJ and NDR based stochastic adder, multiplier, register, which are experimentally demonstrated using 60nm VC-MTJ and CMOS NDR connected on die. These components are then used to realize FIR filter and AdaBoost (machine-learning algorithm). 3X -- 37X energy advantage is shown for the proposed SC compared with CMOS binary arithmetic ASIC and SC designs. |
Year | Venue | Keywords |
|---|---|---|
2017 | DATE | Non-volatile, voltage-controlled magnetic tunnel junction, negative differential resistance, stochastic computing |
Field | DocType | ISSN |
Adder,Computer science,CMOS,Application-specific integrated circuit,Electronic engineering,Multiplier (economics),Non-volatile memory,Finite impulse response,Stochastic computing,Binary number | Conference | 1530-1591 |
Citations | PageRank | References |
1 | 0.37 | 15 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shaodi Wang | 1 | 32 | 4.54 |
| Pal, S. | 2 | 3 | 1.74 |
| Tianmu Li | 3 | 1 | 1.38 |
| Andrew Pan | 4 | 9 | 1.44 |
| Cecile Grezes | 5 | 2 | 0.73 |
| Pedram Khalili | 6 | 23 | 4.29 |
| Kang L. Wang | 7 | 2 | 1.40 |
| Gupta, P. | 8 | 142 | 12.75 |