Paper Info
Title
Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design.
Abstract
The design methodology of an embedded system should start with a system-level partitioning dividing functions into hardware and software. However, since this partitioning decision is taken at a high level of abstraction, we propose regularly validating the selected partitioning during software development. The paper introduces a new model-based engineering process with a supporting toolkit, first performing system-level partitioning, and then assessing the partitioning choices thus obtained at different levels of abstraction during software design. This assessment shall in particular validate the assumptions made on system-level (e.g. on cache miss rates) that cannot be precisely determined without low-level hardware model. High-level partitioning simulations/verification rely on custom model-checkers and abstract models of software and hardware, while low-level prototyping simulations rely on automatically generated C-POSIX software code executing on a cycle-precise virtual prototyping platform. An automotive case study on an automatic braking application illustrates our complete approach.
Year
DOI
Venue
2017
10.5220/0006140600780089
MODELSWARD: PROCEEDINGS OF THE 5TH INTERNATIONAL CONFERENCE ON MODEL-DRIVEN ENGINEERING AND SOFTWARE DEVELOPMENT
Keywords
Field
DocType
Virtual Prototyping,Embedded Systems,System-level Design,Formal Verification
Software design,Computer science,Electronic system-level design and verification,Software,Software construction,Software development,Software verification,Formal verification,Virtual prototyping,Embedded system
Conference
Citations 
PageRank 
References 
2
0.39
0
Authors
3
Name
Order
Citations
PageRank
Daniela Genius122.42
Letitia W. Li241.78
Ludovic Apvrille313622.23