Title
ERFAN: Efficient reconfigurable fault-tolerant deflection routing algorithm for 3-D Network-on-Chip
Abstract
With degradation in transistors dimensions and complication of circuits, Three-Dimensional Network-on-Chip (3-D NoC) is presented as a promising solution in electronic industry. By increasing the number of system components on a chip, the probability of failure will increase. Therefore, proposing fault tolerance mechanisms is an important target in emerging technologies. In this paper, two efficient fault-tolerant routing algorithms for 3-D NoC are presented. The presented algorithms have significant improvement in performance parameters, in exchange for small area overhead. Simulation results show that even with the presence of faults, the network latency is decreased in comparison with state-of-the-art works. In addition, the network reliability is improved reasonably.
Year
DOI
Venue
2016
10.1109/SOCC.2016.7905497
2016 29th IEEE International System-on-Chip Conference (SOCC)
Keywords
Field
DocType
3-D NoC,Fault Tolerance,Deflection Routing Algorithm,TSV,Reliability
Latency (engineering),Algorithm,Communications system,Network on a chip,Chip,Fault tolerance,Deflection routing,Reliability (computer networking),Engineering,Electronic circuit,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-5090-1368-5
0
0.34
References 
Authors
10
5
Name
Order
Citations
PageRank
Somayeh Maabi100.34
Farshad Safaei29519.37
Amin Rezaei3688.33
Masoud Daneshtalab460960.88
Dan Zhao561.09