Title
A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver.
Abstract
This paper describes the design of an energy-efficient vertical-cavity surface-emitting laser (VCSEL) driver circuit implemented in a 130 nm SiGe BiCMOS technology. The driver features a 3-tap feed-forward equalizer where positive and negative peaks are added to the main signal to compensate for the low-pass characteristic of VCSELs. The circuit is also able to generate asymmetric pre-emphasis to ...
Year
DOI
Venue
2017
10.1109/JSSC.2017.2717918
IEEE Journal of Solid-State Circuits
Keywords
Field
DocType
Vertical cavity surface emitting lasers,Equalizers,Inductors,Mathematical model,Optical attenuators,Bandwidth,Jitter
Retiming,Equalization (audio),Computer science,Driver circuit,Inductor,Electronic engineering,Bandwidth (signal processing),Jitter,Vertical-cavity surface-emitting laser,Electrical engineering,Bit error rate
Journal
Volume
Issue
ISSN
52
9
0018-9200
Citations 
PageRank 
References 
5
0.60
2
Authors
4
Name
Order
Citations
PageRank
Guido Belfiore183.48
Mahdi M. Khafaji251.95
Ronny Henker3164.93
Frank Ellinger47940.01