Name
Title | ||
|---|---|---|
Double Buffering for MCDRAM on Second Generation $$\hbox {Intel}^{\circledR }$$ Xeon Phi $$^{\text {TM}}$$ Processors with OpenMP. |
Abstract | ||
|---|---|---|
Emerging novel architectures for shared memory parallel computing are incorporating increasingly creative innovations to deliver higher memory performance. A notable exemplar of this phenomenon is the Multi-Channel DRAM (MCDRAM) that is included in the (hbox {Intel}^{circledR }) XeonPhi(^{text {TM}}) processors. In this paper, we examine techniques to use OpenMP to exploit the high bandwidth of MCDRAM by staging data. In particular, we implement double buffering using OpenMP sections and tasks to explicitly manage movement of data into MCDRAM. We compare our double-buffered approach to a non-buffered implementation and to Intel’s cache mode, in which the system manages the MCDRAM as a transparent cache. We also demonstrate the sensitivity of performance to parameters such as dataset size and the distribution of threads between compute and copy operations. |
Year | Venue | Field |
|---|---|---|
2017 | IWOMP | Dram,MCDRAM,Computer architecture,Shared memory,Computer science,Cache,Xeon Phi,Parallel computing,Multiple buffering,Exploit,Thread (computing) |
DocType | Citations | PageRank |
Conference | 1 | 0.37 |
References | Authors | |
7 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Olivier, Stephen L. | 1 | 254 | 18.08 |
| S. D. Hammond | 2 | 198 | 19.05 |
| Alejandro Duran | 3 | 943 | 61.43 |