Name
Abstract | ||
|---|---|---|
Using power-up reset to reuse Static Random Access Memory (SRAM) as physical unclonable function (PUF) suffers from two major constraints. First, it has limited entropy of only one response bit per cell. Second, as power-up reset has a global effect, extra storage is needed to temporarily buffer the original SRAM content before switching to PUF mode. This process has introduced extra area-power overhead as well as potential security leakage. The emerging dual-port (DP) SRAM cell offers attractive multiple access capability for low-power and high-speed memory transfer. By levering the forbidden contention state in one of its four multiple access modes, a new DP-SRAM based PUF is proposed to generate two independent response bits per cell and limit data buffering to only those cell content addressed by the challenge. Simulation results based on PTM 22nm LP CMOS model has corroborated its superior reliability, uniqueness and randomness over and above these meritorious advantages. |
Year | Venue | Field |
|---|---|---|
2017 | 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | Leakage (electronics),Computer science,Reuse,Electronic engineering,Static random-access memory,CMOS,Sram cell,Physical unclonable function,Transistor,Randomness |
DocType | ISSN | Citations |
Conference | 0271-4302 | 0 |
PageRank | References | Authors |
0.34 | 3 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chao Qun Liu | 1 | 9 | 1.53 |
| Yue Zheng | 2 | 70 | 10.70 |
| Chip-Hong Chang | 3 | 1160 | 123.27 |