Name
Abstract | ||
|---|---|---|
In this manuscript a novel current-mode technique to implement generic Piecewise-Linear (PWL) functions is presented. The main characteristic of the proposed circuits is that errors are not accumulated by adding linear segments; instead they are local, providing more robust designs. The proposed circuits are designed in a standard 0.18 mu m CMOS process with 1.8V power supply. Their operation is based on high precision current mirrors, Winner-Take-All (WTA) and Loser-Take-All (LTA) architectures. Robustness was verified by Monte Carlo analysis and temperature variations from -40 degrees C to 80 degrees C. |
Year | Venue | Keywords |
|---|---|---|
2017 | 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | Current-mode, PWL approximation, Winner-Take-All, Loser-Take-All, exponential function, logarithmic function |
Field | DocType | ISSN |
Monte Carlo method,Current mirror,Control theory,Computer science,Electronic engineering,Robustness (computer science),CMOS,Convex function,Operator (computer programming),Transistor,Electronic circuit | Conference | 0271-4302 |
Citations | PageRank | References |
0 | 0.34 | 3 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| O. J. Cinco-Izquierdo | 1 | 0 | 0.34 |
| María Teresa Sanz | 2 | 2 | 1.09 |
| L. Hernandez | 3 | 0 | 0.34 |
| Carlos Aristoteles De La Blas | 4 | 36 | 10.42 |