Name
Abstract | ||
|---|---|---|
In this paper, we present a method for hardening memory and sequential cells against soft errors. The effect of the ionizing particle on the bulk potential is exploited to prevent the induced SET from propagating in the circuit. The proposed method requires a minimum number of extra transistors. The solution is applied to D Flip-Flop design, and alpha and heavy-ions test results are presented. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/IOLTS.2017.8046194 | 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS) |
Keywords | Field | DocType |
single events,single event transient,single event upset,hardening,pass transistors,LET,SER | Logic gate,Computer science,Hardening (computing),Electronic engineering,Electric potential,Real-time computing,Transistor,MOSFET,Electrical engineering,Particle | Conference |
ISBN | Citations | PageRank |
978-1-5386-0353-6 | 0 | 0.34 |
References | Authors | |
1 | 12 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| I. Nofal | 1 | 0 | 0.34 |
| Adrian Evans | 2 | 11 | 2.93 |
| A.-L. He | 3 | 0 | 0.34 |
| Gang Guo | 4 | 2 | 3.43 |
| Yuanqing Li | 5 | 1160 | 97.18 |
| L. Chen | 6 | 20 | 9.79 |
| R. Liu | 7 | 9 | 3.83 |
| H. Wang | 8 | 84 | 15.66 |
| Mo Chen | 9 | 108 | 16.04 |
| S. H. Baeg | 10 | 0 | 0.68 |
| Shi-Jie Wen | 11 | 114 | 17.64 |
| Richard Wong | 12 | 61 | 9.73 |