Paper Info
Title
Advanced performance improvement algorithms for emerging resistive memory: CBRAM case study
Abstract
Emerging resistive non-volatile memory technology (RRAM) is fast gaining importance as a possible successor of Flash memory. Very few experimental studies exist on emerging RRAM that analyze the impact of soft-techniques or purely algorithm driven performance enhancement for such memory devices. In this paper, we study in detail four different soft techniques optimized for bit-flip minimization, mainly in the context of resistive filamentary type RRAM. In particular, we study the impact of Data Compare Write (DCW), Flip-N-Write (FNW), Coset Coding (CC), and Cost Aware Flip Optimization (CAFO) algorithms. As a case study for experimental validation, we implement the algorithms on a commercial 256 Kb CBRAM chip. Detailed comparative analysis of the soft-techniques is presented for different parameters such as write-latency, endurance, error count, computational latency, and memory overhead.
Year
DOI
Venue
2017
10.1109/NVMSA.2017.8064473
2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA)
Keywords
Field
DocType
Coset Coding,Cost Aware Flip Optimization algorithms,soft-techniques,memory overhead,advanced performance improvement algorithms,resistive memory,nonvolatile memory technology,Flash memory,memory devices,resistive filamentary type RRAM,commercial CBRAM chip,data compare write,DCW,flip-N-write,FNW,CAFO algorithms,storage capacity 256 Kbit
Algorithm design,Flash memory,Computer science,Resistive touchscreen,Algorithm,Chip,Programmable metallization cell,Resistive random-access memory,Performance improvement,Encoding (memory)
Conference
ISSN
ISBN
Citations 
2575-2561
978-1-5386-1769-4
0
PageRank 
References 
Authors
0.34
0
3
Name
Order
Citations
PageRank
Tinish Bhattacharya100.34
Supriya Chakraborty201.01
Manan Suri302.03