Name
Title | ||
|---|---|---|
POSTER: BACM: Barrier-Aware Cache Management for Irregular Memory-Intensive GPGPU Workloads |
Abstract | ||
|---|---|---|
General-purpose workloads running on modern graphics processing units (GPGPUs) rely on hardware-based barriers to synchronize warps within a thread block (TB). However, imbalance may exist before reaching a barrier if a GPGPU workload contains irregular memory accesses, i.e., some warps may be critical while others may not. Ideally, cache space should be reserved for the critical warps. Unfortunately, current cache management policies are unaware of the existence of barriers and critical warps, which significantly limits the performance of irregular memory-intensive GPGPU workloads.In this work, we propose Barrier-Aware Cache Management (BACM), which is built on top of two underlying policies: a greedy policy and a friendly policy. The greedy policy does not allow non-critical warps to allocate cache lines in the L1 data cache; only critical warps can. The friendly policy allows non-critical warps to allocate cache lines but only over invalid or lower-priority cache lines. Based on the L1 data cache hit rate of non-critical warps, BACM dynamically chooses between the greedy and friendly policies. By doing so, BACM reserves more cache space to accelerate critical warps, thereby improving overall performance. Experimental results show that BACM achieves an average performance improvement of 24% and 20% compared to the GTO and BAWS policies, respectively. BACM's hardware cost is limited to 96 bytes per streaming multiprocessor. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/PACT.2017.55 | 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT) |
Keywords | Field | DocType |
irregular memory-intensive GPGPU workloads,BACM,underlying policies,cache management policies,barrier-aware cache management,modern graphic processing units,irregular memory accesses,GPGPU workload,cache space,L1 data cache hit rate,lower-priority cache lines,noncritical warps,friendly policy,greedy policy,memory size 96.0 Byte | Hit rate,Cache pollution,Computer science,Cache,Parallel computing,Cache algorithms,Multiprocessing,Real-time computing,General-purpose computing on graphics processing units,Benchmark (computing),Performance improvement | Conference |
ISSN | ISBN | Citations |
1089-795X | 978-1-5090-6765-7 | 0 |
PageRank | References | Authors |
0.34 | 6 | 7 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yu-xi Liu | 1 | 21 | 4.70 |
| Xia Zhao | 2 | 31 | 11.44 |
| Zhibin Yu | 3 | 141 | 17.67 |
| Zhenlin Wang | 4 | 91 | 6.68 |
| Xiaolin Wang | 5 | 155 | 31.70 |
| Yingwei Luo | 6 | 315 | 41.30 |
| Lieven Eeckhout | 7 | 2863 | 195.11 |