Title
Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach
Abstract
Power consumption and high compute density are the key factors to be considered when building a compute node for the upcoming Exascale revolution. Current architectural design and manufacturing technologies are not able to provide the requested level of density and power efficiency to realise an operational Exascale machine. A disruptive change in the hardware design and integration process is needed in order to cope with the requirements of this forthcoming computing target. This paper presents the ExaNoDe H2020 research project aiming to design a highly energy efficient and highly integrated heterogeneous compute node targeting Exascale level computing, mixing low-power processors, heterogeneous co-processors and using advanced hardware integration technologies with the novel UNIMEM Global Address Space memory system.
Year
DOI
Venue
2017
10.1109/DSD.2017.37
2017 Euromicro Conference on Digital System Design (DSD)
Keywords
Field
DocType
Exascale,HPC,Unimem,silicon interposer,virtualization
Electrical efficiency,Virtualization,Architectural design,Computer science,Efficient energy use,Parallel computing,Silicon interposer,Real-time computing,Power demand,Global address space,Power consumption
Conference
ISBN
Citations 
PageRank 
978-1-5386-2147-9
1
0.35
References 
Authors
9
20