Name
Abstract | ||
|---|---|---|
Side channel attacks have become a major threat to hardware systems. Most modern digital IC designs utilize sequential elements which dominate the information leakage. This paper reports the first unified analysis and comprehensive comparison of known secure flip-flop circuits. We present a device level analysis of the information leakage from these FFs and propose several evaluation metrics to quantify their security. We show that simulated PA attacks that utilize the information evaluated by these metrics at the gate-level extract more information at the module-level. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/ACCESS.2017.2766243 | IEEE ACCESS |
Keywords | Field | DocType |
Cryptography,countermeasures,CPA,DPA,flip-flops,power analysis,sequential-circuits,synchronous | Logic gate,Information leakage,Computer science,Computer network,Side channel attack,Flip-flop,Electronic circuit,Computer hardware,Transistor | Journal |
Volume | ISSN | Citations |
5 | 2169-3536 | 0 |
PageRank | References | Authors |
0.34 | 17 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Itamar Levi | 1 | 67 | 10.38 |
| Netanel Miller | 2 | 0 | 0.34 |
| Elad Avni | 3 | 0 | 0.34 |
| Osnat Keren | 4 | 106 | 20.19 |
| Alexander Fish | 5 | 123 | 21.24 |