Name
Title | ||
|---|---|---|
Design Of A High-Throughput Sliding Block Viterbi Decoder For Ieee 802.11ac Wlan Systems |
Abstract | ||
|---|---|---|
This paper presents a high-throughput sliding block Viterbi decoder for IEEE 802.11ac systems. A 64-state bidirectional sliding block Viterbi method is proposed to meet the speed requirement of the system. The decoder throughput goes up to 640 Mbps, which can be further increased by adding the block parallelism. Moreover, a modified add compare-select (ACS) unit is designed to enhance the working frequency. The modified ACS unit obtains nearly 26% speed-up, compared to the conventional ACS unit. However, the area overhead and power dissipation are almost the same. The decoder is designed in a SMIC 0.13 mu m technology, and it occupies 1.96 mm(2) core area and 105 mW power consumption with an energy efficiency of 0.1641 nJ/bit with a 1.2 V voltage supply. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1587/transfun.E100.A.1606 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | Field | DocType |
sliding block Viterbi decoder (SBVD), add-compare-select (ACS), IEEE 802.11ac, high-throughput | Computer network,Theoretical computer science,Viterbi decoder,Throughput,Computer engineering,Mathematics,IEEE 802.11ac | Journal |
Volume | Issue | ISSN |
E100A | 8 | 1745-1337 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kaifeng Xia | 1 | 5 | 1.82 |
| Bin Wu | 2 | 3 | 6.48 |
| tao xiong | 3 | 20 | 6.67 |
| Cheng-Ying Chen | 4 | 2 | 2.42 |