Name
Title | ||
|---|---|---|
A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors. |
Abstract | ||
|---|---|---|
As technology edges closer to fundamental limits, variations of process parameters, operational voltage, and temperature (PVT variations) have to be accounted for. This paper proposes to make higher levels aware of these variations and bring them under system control by using software controlled body biasing. PVT variations can thus be exploited to reduce power and energy consumption.—Axel Jantsch... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/MDAT.2017.2750907 | IEEE Design & Test |
Keywords | Field | DocType |
Computer architecture,Program processors,Energy efficiency,Hardware,System-on-chip,Monitoring | Architecture,System on a chip,Computer science,Efficient energy use,Voltage,Electronic engineering,Software,Control system,Power nap,Biasing | Journal |
Volume | Issue | ISSN |
34 | 6 | 2168-2356 |
Citations | PageRank | References |
2 | 0.38 | 8 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Davide Rossi | 1 | 416 | 47.47 |
| Igor Loi | 2 | 445 | 30.66 |
| Antonio Pullini | 3 | 390 | 28.27 |
| Christoph Muller | 4 | 2 | 0.72 |
| A. Burg | 5 | 1426 | 126.54 |
| Francesco Conti 0001 | 6 | 125 | 18.24 |
| Luca Benini | 7 | 13116 | 1188.49 |
| Philippe Flatresse | 8 | 97 | 15.35 |