Name
Abstract | ||
|---|---|---|
In this paper, the hardware implementation of a neuromorphic system is presented. This system is composed of a Leaky Integrate-and-Fire with Latency (LIFL) neuron and a Spike-Timing Dependent Plasticity (STDP) synapse. LIFL neuron model allows to encode more information than the common Integrate-and-Fire models, typically considered for neuromorphic implementations. In our system LIFL neuron is implemented using CMOS circuits while memristor is used for the implementation of the STDP synapse. A description of the entire circuit is provided. Finally, the capabilities of the proposed architecture have been evaluated by simulating a motif composed of three neurons and two synapses. The simulation results confirm the validity of the proposed system and its suitability for the design of more complex spiking neural networks. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1016/j.vlsi.2017.05.006 | Integration |
Keywords | DocType | Volume |
Leaky Integrate-and-Fire with Latency (LIFL),Neuron,Synapse,STDP,Memristor,Neuromorphic system,Analog VLSI | Journal | 59 |
Issue | ISSN | Citations |
C | 0167-9260 | 2 |
PageRank | References | Authors |
0.38 | 22 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Simone Acciarito | 1 | 2 | 2.41 |
| Gian-carlo Cardarilli | 2 | 110 | 20.75 |
| Alessandro Cristini | 3 | 3 | 1.74 |
| Luca Di Nunzio | 4 | 11 | 9.61 |
| Rocco Fazzolari | 5 | 11 | 9.36 |
| Gaurav Mani Khanal | 6 | 2 | 2.07 |
| Marco Re | 7 | 194 | 35.03 |
| Gianluca Susi | 8 | 4 | 2.11 |