Name
Abstract | ||
|---|---|---|
This article studies the design of custom circuits for division by a small positive constant. Such circuits can be useful for specific FPGA and ASIC applications. The first problem studied is the Euclidean division of an unsigned integer by a constant, computing a quotient and remainder. Several new solutions are proposed and compared against the state-of-the-art. As the proposed solutions use sma... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/TC.2017.2707488 | IEEE Transactions on Computers |
Keywords | Field | DocType |
Field programmable gate arrays,Table lookup,Generators,Program processors,Application specific integrated circuits | Integer,Division algorithm,Computer science,Quotient,Parallel computing,Field-programmable gate array,Remainder,Real-time computing,Rounding,Euclidean division,Computer hardware,Modulo operation | Journal |
Volume | Issue | ISSN |
66 | 12 | 0018-9340 |
Citations | PageRank | References |
4 | 0.48 | 11 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| H. Fatih Ugurdag | 1 | 52 | 11.28 |
| Florent de Dinechin | 2 | 503 | 43.43 |
| Y. Serhan Gener | 3 | 4 | 1.50 |
| S. Gören | 4 | 14 | 3.12 |
| Laurent-Stéphane Didier | 5 | 108 | 11.89 |