Name
Title | ||
|---|---|---|
A Compact, Low-Power-Consumption 5-Gbps Oeic Receiver Without Equalizer Fabricated In 0.18-Mu M Cmos Technology |
Abstract | ||
|---|---|---|
A low-cost, compact 5-Gbps fully integrated CMOS optical receiver without equalizer is fabricated in this paper in a standard 0.18-mu m CMOS technology. The measured responsivity of the DNW-strip-SMPD operating in avalanche mode is 1.4 A/W, while the bandwidth is 2.9 GHz with 11.6 V reverse bias voltage. The application for 5-Gbps very-short-reach optoelectronic integrated circuit (OEIC) receiver with a bit-error rate <10(-12) at incident optical power of -4 dBm has been experimentally demonstrated. The core chip area of the OEIC receiver is 0.736 mm by 0.515 mm, and it consumes 96 mW from the 1.8 V supply. Our OEIC receiver has the smallest area and the lowest power consumption in the OEIC receivers reported so far fabricated in 0.18-mu m CMOS technology. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1587/elex.14.20170679 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
fully integrated, equalizer, avalanche mode, optoelectronic integrated circuit, very-short-reach | Equalizer,Computer science,Electronic engineering,CMOS,Optoelectronic integrated circuits,Electrical engineering,Power consumption | Journal |
Volume | Issue | ISSN |
14 | 15 | 1349-2543 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chen Fan | 1 | 3 | 2.67 |
| Rong Wang | 2 | 0 | 0.68 |
| Zhigong Wang | 3 | 29 | 21.30 |