Name
Title | ||
|---|---|---|
A High-Efficient And Accurate Fault Model Aiming At Fpga-Based Aes Cryptographic Applications |
Abstract | ||
|---|---|---|
Setup time variation fault attacks that aim straightly at the FPGA devices have become hot spots nowadays. A high-efficient and accurate fault model aiming at FPGA-based cryptographic applications is proposed in this paper. Multi-diagonal faults are considered in this paper, thus more exploitable faulty ciphertexts can be gathered compared with the previous model. Multi-fault analysis is introduced due to the existence of multi-fault injection, which guarantees the accuracy of the result. Experiment result shows that the fault model brings a significant increase up to 36.5% of the exploitable faults compared with the previous method. Within 24 pairs of correct and faulty ciphertexts, the complete round key can be retrieved by this model. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ASICON.2015.7517030 | PROCEEDINGS OF 2015 IEEE 11TH INTERNATIONAL CONFERENCE ON ASIC (ASICON) |
Keywords | Field | DocType |
Setup time variation, FPGA, Fault model | Stuck-at fault,Cryptography,Computer science,Field-programmable gate array,Real-time computing,Electronic engineering,Fault model,Embedded system | Conference |
ISSN | Citations | PageRank |
2162-7541 | 0 | 0.34 |
References | Authors | |
0 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nan Liao | 1 | 35 | 4.56 |
| Xiaoxin Cui | 2 | 35 | 6.59 |
| Wang Tian | 3 | 17 | 15.16 |
| Liao Kai | 4 | 5 | 2.09 |
| Ni Yewen | 5 | 6 | 1.88 |
| Dunshan Yu | 6 | 44 | 12.56 |
| Cui Xiaole | 7 | 21 | 15.35 |