Abstract | ||
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Reliability testing has become extremely important in modern electronics as the soft error rate has been increasing due to technology scaling. The testing must be controllable, generic, done before deployment, cheap, and fast. Even though fault injection is often the most appropriate solution considering these requirements, it is very time-consuming. This work proposes a hybrid fault injection framework that automatically switches between RTL and gate-level simulation modes to speed up fault injection over conventional simulators by more than 10 times, maintaining gate-level fault injection accuracy and controllability. The proposed framework is generic, so that faults can be injected to any arbitrary circuit; and supports concurrent execution of several simulations. As case study, the reliability of a complex 8-issue VLIW processor is assessed. |
Year | DOI | Venue |
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2017 | 10.1109/SBESC.2017.19 | 2017 VII Brazilian Symposium on Computing Systems Engineering (SBESC) |
Keywords | Field | DocType |
fault injection,reliability,RTL simulation,soft errors,gate-level simulation | Logic gate,Controllability,Soft error,Computer science,Very long instruction word,Injector,Electronics,Fault injection,Embedded system,Speedup | Conference |
ISBN | Citations | PageRank |
978-1-5386-3591-9 | 0 | 0.34 |
References | Authors | |
19 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Anderson Luiz Sartor | 1 | 31 | 7.67 |
Pedro Henrique Exenberger Becker | 2 | 2 | 2.07 |
Antonio C. Beck | 3 | 117 | 32.17 |