Name
Abstract | ||
|---|---|---|
Engineering change order (ECO) is pivotal in rectifying late design changes that occur commonly due to ever-increasing system complexity. Existing functional ECO methods focus on combinational equivalence assuming a known input correspondence between the old implementation and new specification. They are inadequate for rectifying circuits under sequential transformations. This inadequacy hinders the utilization of powerful and effective sequential optimization methods using retiming and resynthesis. As retiming and/or resynthesis gains increasing adoption in industry, incorporating sequential ECO techniques into the hardware design flow becomes essential. In this paper, we provide the first attempt to extend ECO to designs under retiming and resynthesis in an industrial flow by leveraging conventional combinational ECO engine. Experimental results over industrial ECO benchmarks justify the promising practicality of our methods.
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Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/ICCAD.2017.8203767 | ICCAD |
Keywords | Field | DocType |
industrial flow,industrial ECO benchmarks,sequential engineering change order,system complexity,combinational equivalence,rectifying circuits,sequential transformations,sequential ECO techniques,hardware design flow,sequential optimization methods,combinational ECO engine | Sequential optimization,Retiming,Engineering change order,Post-silicon validation,Computer science,Design flow,Electronic engineering,Equivalence (measure theory),Electronic circuit,Computer engineering | Conference |
ISSN | ISBN | Citations |
1933-7760 | 978-1-4503-5950-4 | 0 |
PageRank | References | Authors |
0.34 | 21 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nian-Ze Lee | 1 | 5 | 4.19 |
| Victor N. Kravets | 2 | 124 | 11.78 |
| Jie-Hong R. Jiang | 3 | 353 | 37.47 |