Name
Abstract | ||
|---|---|---|
A novel digital mixer implemented in TSMC 65 nm CMOS technology is proposed. 25% duty cycle quadrature 4-phase clocks are used for requirement of time division multiplexing system. The proposed digital mixer is insensitive to clock jitter though the sampling frequency is 10.8-GHz. LTE protocol can be performed to the digital mixer. At 2.7GHz local oscillator frequency, the total power consumption is only 6.8mW when a 12-bit LTE signal with 40MHz bandwidth is applied. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/ASICON.2017.8252422 | 2017 IEEE 12th International Conference on ASIC (ASICON) |
Keywords | Field | DocType |
digital mixer,CMOS technology,quadrature 4-phase clocks,time division multiplexing,LTE protocol | Computer science,Duty cycle,Sampling (signal processing),CMOS,Electronic engineering,Radio frequency,Bandwidth (signal processing),Jitter,Time-division multiplexing,Local oscillator | Conference |
ISSN | ISBN | Citations |
2162-7541 | 978-1-5090-6626-1 | 0 |
PageRank | References | Authors |
0.34 | 0 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Haijun Shao | 1 | 1 | 3.14 |
| Dan Fan | 2 | 0 | 0.34 |
| Pan Xue | 3 | 11 | 2.19 |
| Hongguang Zhang | 4 | 106 | 16.70 |
| Y. L. Shen | 5 | 0 | 1.69 |
| Yumei Huang | 6 | 4 | 3.00 |
| Gan Guo | 7 | 0 | 0.34 |
| Zhi-Liang Hong | 8 | 3 | 4.14 |