Name
Abstract | ||
|---|---|---|
Based on time-domain quality factor (Q-factor) measurement principle, we have proposed an implementation architecture which can be integrated on chip. In this paper, some special techniques have been proposed in order to make the on-chip Q-factor measurement not only accurate at a specific frequency but also without any accuracy loss within a range of frequencies. Besides based on a reconfigurable structure, some special design techniques have also been proposed in this paper to compensate the imperfection of a non-ideal peak detection apart from the automatic offset cancellation. Moreover along with the analog circuit design, a digital control circuit has been proposed to generate all the digital control signals. The proposed implementation is designed in a 0.35μm CMOS technology under a single 5V voltage supply. The simulation results demonstrate that the Q-factor measurement accuracy is within 0.1% for a working frequency ranging from 100 to 300 kHz. |
Year | Venue | Field |
|---|---|---|
2017 | ASICON | Time domain,Q factor,Capacitor,Computer science,Resonator,CMOS,Electronic engineering,Ranging,Measuring principle,Digital control |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xiaojiao Ren | 1 | 0 | 0.68 |
| ming zhang | 2 | 1 | 0.77 |
| Nicolas Llaser | 3 | 16 | 8.11 |