Name
Abstract | ||
|---|---|---|
This paper presents a binary frequency shift keying (BFSK) demodulator for low intermediate frequency (IF) receivers and an FPGA based bit error rate (BER) measurement platform for the same. The custom made demodulator is fabricated in 180 nm CMOS mixed mode technology, which occupies an area of 0.09 mm
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>
and consumes 80 μW power from 1.8 V supply. When integrated with a low IF (2 MHz) receiver front end for Medical Device Radio Communication (MedRadio) spectrum at 400 MHz, the measured BER was less than 10
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−3</sup>
at a data rate of 200 kbps for an FSK frequency deviation of 150 kHz. |
Year | DOI | Venue |
|---|---|---|
2016 | 10.1109/ISVDAT.2016.8064901 | 2016 20th International Symposium on VLSI Design and Test (VDAT) |
Keywords | Field | DocType |
FSK frequency deviation,FSK demodulator,FPGA based BER measurement system,low intermediate frequency,FPGA based bit error rate measurement platform,Medical Device Radio Communication spectrum,BFSK demodulator,low IF receiver front end,binary frequency shift demodulator,CMOS mixed mode technology,BER,size 180.0 nm,size 0.09 mm,power 80.0 muW,voltage 1.8 V,frequency 2.0 MHz,frequency 400.0 MHz,frequency 150.0 kHz | Demodulation,System of measurement,Frequency-shift keying,Computer science,Intermediate frequency,Frequency deviation,Field-programmable gate array,CMOS,Electronic engineering,Electrical engineering,Bit error rate | Conference |
ISSN | ISBN | Citations |
2475-8620 | 978-1-5090-1423-1 | 1 |
PageRank | References | Authors |
0.38 | 2 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| K. Nithin Sankar | 1 | 4 | 0.81 |
| Abhishek Srivastava | 2 | 88 | 22.03 |
| Baibhab Chatterjee | 3 | 5 | 1.86 |
| R. Jain | 4 | 45 | 4.70 |
| Maryam Shojaei Baghini | 5 | 86 | 29.67 |