Paper Info
Title
A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study
Abstract
This paper presents a critical charge model for estimating the SET and SEU robustness. The proposed model has been derived by analytic fitting of SPICE results, using a Muller C-element designed in 65 and 130 nm bulk CMOS technologies as the target device. The critical charge is expressed in terms of the size of C-element, size of load inverter, supply voltage and temperature, for constant timing parameters of the SET/SEU current pulse. The proposed model could be utilized to calculate the critical charge causing a SET, for both analyzed technologies, with the accuracy comparable to SPICE simulations. The critical charge for SEU was higher than for SET, but the dependencies obtained for SET response were qualitatively similar to those for SEU. This implies that the proposed critical charge model may be applicable for optimizing the SET/SEU robustness evaluation of the circuits involving the Muller C-element. Moreover, the model may also serve as a basis for evaluating the SET/SEU robustness of other standard cells and other technologies, and thus also for analysis of the SET/SEU robustness of complex circuits.
Year
DOI
Venue
2017
10.1109/ATS.2017.27
2017 IEEE 26th Asian Test Symposium (ATS)
Keywords
Field
DocType
Critical charge,Muller C-element,SET effects,SEU effects,SPICE simulations
Inverter,Logic gate,Computer science,Spice,Voltage,Electronic engineering,Robustness (computer science),CMOS,Electronic circuit,C-element
Conference
ISSN
ISBN
Citations 
1081-7735
978-1-5386-3516-2
0
PageRank 
References 
Authors
0.34
5
5
Name
Order
Citations
PageRank
Marko S. Andjelkovic145.31
Milos Krstic217039.42
Rolf Kraemer310625.01
Varadan Savulimedu Veeravalli4133.72
Andreas Steininger501.01