Title
N-D Svpwm With Dc Voltage Balancing And Vector Smooth Transition Algorithm For A Cascaded Multilevel Converter
Abstract
Direct current voltages unbalance of respective power cells is an inherent and critical problem in a cascaded multilevel converter, which is widely used in the solid-state transformer. In this paper, an n-dimension space vector pulse width modulation is presented to address this issue in a three-level H-bridge-based cascaded multilevel converter. This algorithm utilizes the redundant switching pairs of the inner cell and the redundant vectors of mutual cells to balance capacitors' and cells' voltages. Meanwhile, a smooth vector transition strategy is included in this algorithm to avoid the level-skip phenomenon. The calculation processes are analyzed in one-cell, two-cells, and three-cells modes, respectively. It is simple, calculable, and flexible to extend in n-cells mode. Finally, the voltage balancing capacity of the inner cell and mutual cells with smooth level transition are verified by simulations and experiments not only at startup but also with unbalanced loads.
Year
DOI
Venue
2018
10.1109/TIE.2017.2764838
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Keywords
Field
DocType
Cascaded three-level H-bridge converter, n-dimension space vector pulse width modulation (n-D SVPWM), smooth vector transition, solid-state transformer (SST), voltage balancing
Direct current,Capacitor,Space vector,Control theory,Voltage,Forward converter,Algorithm,Transformer,Pulse-width modulation,Control engineering,Engineering
Journal
Volume
Issue
ISSN
65
5
0278-0046
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Hongjian Lin111.02
Zeliang Shu2567.71
Xiaoqiong He351.58
Ming Liu427650.00