Abstract | ||
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This paper presents the FPGA implementation of an ASR system in a car environment. The voice feature vectors are extracted by using Mel-Frequency Cepstral Coefficients and compared by using FastDTW algorithms. The recognition rate of the proposed system is 81.5%. Both MFCC and FastDTW algorithms are implemented by Verilog HDL. The target device is chosen as Altera DE2-115. |
Year | DOI | Venue |
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2015 | 10.1109/GCCE.2015.7398519 | 2015 IEEE 4th Global Conference on Consumer Electronics (GCCE) |
Keywords | Field | DocType |
Automatic Speech Recognition,Fast Dynamic Time Warping,Mel-Frequency Cepstral Coefficients Introduction | Mel-frequency cepstrum,Feature vector,Pattern recognition,Computer science,Field-programmable gate array,Speech recognition,Artificial intelligence,Verilog | Conference |
Citations | PageRank | References |
0 | 0.34 | 2 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Dong-Fong Syu | 1 | 0 | 0.34 |
Su-Wei Syu | 2 | 0 | 0.34 |
Shanq-Jang Ruan | 3 | 375 | 55.44 |
Yu-Chang Huang | 4 | 0 | 0.34 |
Chuan-Kai Yang | 5 | 169 | 20.48 |