Name
Abstract | ||
|---|---|---|
A dual-peak maximum achievable gain core design technique is proposed. It has been adopted into a 4-stage wideband amplifier. Implemented in a 65nm CMOS, the amplifier achieves 3dB bandwidth of 30GHz (230∼260GHz), gain of 12.4±1.5dB, and peak PAE of 1.6% while dissipating 23.8mW, which corresponds to the widest bandwidth and highest gain per stage among other reported CMOS amplifiers operating above 200GHz.
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Year | Venue | DocType |
|---|---|---|
2018 | ASP-DAC | Conference |
ISBN | Citations | PageRank |
978-1-4503-6007-4 | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dae-Woong Park | 1 | 0 | 2.03 |
| Dzuhri Radityo Utomo | 2 | 4 | 3.84 |
| jongphil | 3 | 1 | 1.83 |
| Sang-Gug Lee | 4 | 427 | 85.52 |