Paper Info
Title
Polymorphic gate based IC watermarking techniques
Abstract
Polymorphic gates are reconfigurable devices whose functionality may vary in response to the change of execution environment such as temperature, supply voltage or external control signals. This feature makes them a perfect candidate for circuit watermarking. However, polymorphic gates are hard to find because they do not exhibit the traditional structure. In this paper, we report four dual-function polymorphic gates that we have discovered using an evolutionary approach. With these gates, we propose a circuit watermarking scheme that selectively replaces certain standard logic gates with the polymorphic gates. Experimental results on ISCAS and MCNC benchmark circuits demonstrate that this scheme introduces low overhead. More specifically, the average overhead in area, speed and power are 4.10%, 2.08% and 1.17% respectively when we embed 30-bit watermark sequences. These overheads increase to 6.36%, 4.75% and 2.08% respectively when 10% of the gates in the original circuits are replaced to embed watermark up to more than 300 bits.
Year
DOI
Venue
2018
10.1109/ASPDAC.2018.8297288
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Keywords
Field
DocType
polymorphic gate,IC watermarking techniques,dual-function polymorphic gates,reconfigurable devices,logic gates,integrated circuit watermarking scheme,ISCAS benchmark circuits,MCNC benchmark circuits,watermark sequences
Digital watermarking,Logic gate,Computer science,Voltage,Electronic engineering,Watermark,Physical unclonable function,Computer hardware,Electronic circuit,Transistor,Genetic algorithm
Conference
Volume
ISSN
ISBN
2018-January
2153-6961
978-1-4503-6007-4
Citations 
PageRank 
References 
0
0.34
8
Authors
7
Name
Order
Citations
PageRank
Wang Tian11715.16
Cui Xiaoxin2129.82
Dunshan Yu34412.56
Aramoon Omid400.34
Dunlap Timothy500.34
Gang Qu62476270.62
Cui Xiaole72115.35