Abstract | ||
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Deep neural networks (DNNs) have gained popularity for their state-of-the-art accuracy and relative ease of use. DNNs rely on a growing variety of matrix multiply operations (i.e., dense to sparse, FP32 to N-bit). We propose an OpenCL-based matrix multiply design template, which enables automated design exploration to generate optimized FPGA matrix accelerators for DNN applications. Given the desired matrix operations (e.g., sparsity, data types), our template rapidly produces performance and area estimates for a variety of design variants and/or FPGA platforms. Upon identifying compelling design points and target platforms, FPGA implementations can then be generated automatically using the Intel® OpenCL™ FPGA SDK. We show the effectiveness of the template with a comparison to hand-tuned RTL, a design space exploration, and a DNN case study. |
Year | DOI | Venue |
---|---|---|
2017 | 10.1109/FPT.2017.8280155 | 2017 International Conference on Field Programmable Technology (ICFPT) |
Keywords | Field | DocType |
Customizability,Matrix,OpenCL,Deep Learning | Computer architecture,Matrix (mathematics),Computer science,Parallel computing,Usability,Field-programmable gate array,Data type,Design space exploration,Matrix multiplication,Deep neural networks,Design exploration | Conference |
ISBN | Citations | PageRank |
978-1-5386-2657-3 | 2 | 0.40 |
References | Authors | |
3 | 8 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jack Yinger | 1 | 2 | 0.40 |
Eriko Nurvitadhi | 2 | 399 | 33.08 |
Davor Capalija | 3 | 130 | 9.33 |
Andrew C. Ling | 4 | 150 | 12.10 |
Debbie Marr | 5 | 175 | 12.39 |
Srivatsan Krishnan | 6 | 96 | 6.86 |
Duncan J. M. Moss | 7 | 91 | 7.74 |
Suchit Subhaschandra | 8 | 82 | 5.50 |