Title
A Scalable Approach for Hardware Semiformal Verification.
Abstract
The current verification flow of complex systems uses different engines synergistically: virtual prototyping, formal verification, simulation, emulation and FPGA prototyping. However, none is able to verify a complete architecture. Furthermore, hybrid approaches aiming at complete verification use techniques that lower the overall complexity by increasing the abstraction level. This work focuses on the verification of complex systems at the RT level to handle the hardware peculiarities. Our results show an improvement of 100% compared to the commercial toolu0027s results for the prototype we used to validate our approach.
Year
Venue
Field
2018
arXiv: Logic in Computer Science
Complex system,Architecture,FPGA prototype,Emulation,Computer hardware,Abstraction layer,Mathematics,Formal verification,Scalability,Virtual prototyping
DocType
Volume
Citations 
Journal
abs/1801.08446
0
PageRank 
References 
Authors
0.34
3
3
Name
Order
Citations
PageRank
Tomas Grimm100.34
Djones Lettnin2397.68
Hubner, Michael339047.98