Name
Abstract | ||
|---|---|---|
Energy consumption is increasingly becoming a limiting factor to the design of faster large-scale parallel systems, and development of energy-efficient and energy-aware applications is today a relevant issue for HPC code-developer communities. In this work we focus on energy performance of the Knights Landing (KNL) Xeon Phi, the latest many-core architecture processor introduced by Intel into the HPC market. We take into account the 64-core Xeon Phi 7230, and analyze its energy performance using both the on-chip MCDRAM and the regular DDR4 system memory as main storage for the application data-domain. As a benchmark application we use a Lattice Boltzmann code heavily optimized for this architecture and implemented using different memory data layouts to store its lattice. We assessthen the energy consumption using different memory data-layouts, kind of memory (DDR4 or MCDRAM) and number of threads per core. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.3233/978-1-61499-843-3-733 | parallel computing |
DocType | Volume | Citations |
Journal | abs/1804.01911 | 0 |
PageRank | References | Authors |
0.34 | 10 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Enrico Calore | 1 | 50 | 8.63 |
| Alessandro Gabbana | 2 | 25 | 3.02 |
| Sebastiano Fabio Schifano | 3 | 191 | 28.37 |
| Raffaele Tripiccione | 4 | 145 | 20.46 |