Title
CMOS digital design of a trusted virtual sensor
Abstract
This work presents the digital design of a trusted virtual sensor. The virtual sensor implements a piecewise-affine (PWA)-based model to estimate the sensed variable. The measurement is authenticated with the keyed-hash message authentication code (HMAC) standard. To ensure the integrity of the sensor, the static random access memory (SRAM) required by the sensor is also used as physical unclonable function (PUF). Implementation results of the design in a 90-nm CMOS technology show that the security blocks occupy 5.1% of the area occupied by the required PWA blocks and consume 15.4% of the power consumed by the required PWA blocks. The sensor is able to provide trusted outputs in 106.3 microseconds when working at 100 MHz.
Year
DOI
Venue
2017
10.1109/NORCHIP.2017.8124948
2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
Keywords
Field
DocType
static random access memory,trusted outputs,CMOS digital design,trusted virtual sensor,CMOS technology,piecewise-affine-based model,PWA-based model,keyed-hash message authentication code standard,keyed-HMAC standard,SRAM,physical unclonable function,PUF,PWA blocks,security blocks,time 106.3 mus,frequency 100.0 MHz,size 90 nm
Hash-based message authentication code,Authentication,Message authentication code,Computer science,Static random-access memory,CMOS,Real-time computing,Physical unclonable function,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-5386-2845-4
1
0.36
References 
Authors
5
4
Name
Order
Citations
PageRank
Macarena C. Martinez-Rodriguez1102.61
Miguel Angel Prada210.36
Piedad Brox3326.57
Iluminada Baturone414923.70