Title
Papr Reduction Method For Digital Predistortion Linearizer Compensating For Frequency Dependent Imd Components
Abstract
This paper proposes a method for reducing the peak-to-average power ratio (PAPR) at the output signal of a digital predistortion linearizer (DPDL) that compensates for frequency dependent intermodulation distortion (IMD) components. The proposed method controls the amplitude and phase values of the frequency components corresponding to the transmission bandwidth of the output signal. A DPDL employing the proposed method simultaneously provides IMD component cancellation of out-of-band components and PAPR reduction at the output signal. This paper identifies the amplitude and phase conditions to minimize the PAPR. Experimental results based on a 2-GHz band 1-W class power amplifier show that the proposed method improves the drain efficiency of the power amplifier when degradation is allowed in the error vector magnitude. To the best knowledge of the authors, this is the first PAPR reduction method for DPDL that reduces the PAPR while simultaneously compensating for IMD components.
Year
DOI
Venue
2018
10.1587/transele.E101.C.118
IEICE TRANSACTIONS ON ELECTRONICS
Keywords
Field
DocType
peak-to-average power ratio (PAPR) reduction, base station power amplifier (PA), digital predistortion linearizer (DPDL), drain efficiency
Electronic engineering,Linearizer,Engineering,Predistortion
Journal
Volume
Issue
ISSN
E101C
2
1745-1353
Citations 
PageRank 
References 
0
0.34
0
Authors
3
Name
Order
Citations
PageRank
Yasunori Suzuki124.37
Junya Ohkawara200.34
Shoichi Narahashi358.14