Name
Abstract | ||
|---|---|---|
It has always been a challenging task to implement a turbo decoder because it's typically the most compute-intensive and time-consuming part in a wireless communication system. This becomes especially obvious when realizing a turbo decoder through CPUs or GPUs. In this paper, we present a heterogeneous and highly reconfigurable parallel turbo decoder for LTE by employing a multi-core processor platform. A modified sliding-window algorithm is proposed to fully exploit the parallelism of turbo decoder, and a SIMD hardware module is designed for the multi-core processor to accelerate the decoding process. Synthesized result in a 65-nm CMOS process shows that the whole system can run at a maximum clock frequency of 830 MHz, and a decoding throughput of 135 Mbps is achieved for a codeword block length of 6144 at 6 iterations. In addition, the speed-up rate compared to an unaccelerated implementation through the same multi-core platform is in the order of 800%. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1587/elex.14.20170768 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
heterogeneous, parallel turbo decoder, multi-core, SDR | Computer science,Parallel computing,Turbo decoder,Electronic engineering,Turbo equalizer,Computer hardware,Multi-core processor | Journal |
Volume | Issue | ISSN |
14 | 18 | 1349-2543 |
Citations | PageRank | References |
0 | 0.34 | 6 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jianmin Zeng | 1 | 1 | 1.70 |
| Chubin Wu | 2 | 0 | 1.01 |
| Zhang Zhang | 3 | 5 | 8.09 |
| Xin Cheng | 4 | 0 | 1.35 |
| Guangjun Xie | 5 | 29 | 9.64 |
| Jun Han | 6 | 91 | 24.48 |
| Xiaoyang Zeng | 7 | 442 | 107.26 |
| Zhiyi Yu | 8 | 81 | 18.24 |