Name
Title | ||
|---|---|---|
Task graph mapping and scheduling on heterogeneous architectures under communication constraints |
Abstract | ||
|---|---|---|
An approach for mapping applications represented as Directed Acyclic Graphs (DAGs) on platforms consisting of heterogeneous cores considering the communication overhead between the cores is introduced. The approach is based on the Benders decomposition principle and integrates Integer Linear and Constraint Programming formulations. Both formulations take into account the communication delay between dependent tasks that are assigned to different cores trying to optimize the application's execution time. The proposed approach succeeds to provide the optimal solution in all cases of synthetic and real-application DAGs, while the pure ILP model fails more than half of them. Also, the average solution time of the proposed method is about 1 minute, whereas for instances solved by both models, the speedup equals to 11× over the ILP model. |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/SAMOS.2017.8344634 | 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) |
Keywords | Field | DocType |
Multicore processing,Processor scheduling,Integer linear programming,Constraint programming | Integer,Graph,Task analysis,Scheduling (computing),Computer science,Constraint programming,Parallel computing,Execution time,Multi-core processor,Speedup | Conference |
ISBN | Citations | PageRank |
978-1-5386-3438-7 | 1 | 0.36 |
References | Authors | |
9 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Andreas Emeretlis | 1 | 11 | 2.95 |
| T. Tsakoulis | 2 | 1 | 0.36 |
| george theodoridis | 3 | 67 | 14.19 |
| Panayiotis Alefragis | 4 | 120 | 14.33 |
| Nikos S. Voros | 5 | 25 | 5.31 |