Abstract | ||
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Dynamic Partial Reconfigurable (DPR) systems enable the exchange of system modules during runtime, and thus, an application-specific optimization of the system. However, the development of these systems, their modules, and the integration is a complex task. In this paper, we present our framework for DPR overlays. With our approach we enable a description of the overlay, and thus the hardware, via software. Based on the software description, our framework assembles the overlay in the field. Therefore, pre-implemented processing modules are loaded into reconfigurable partitions via DPR. The concept of DPR overlays is similar to pre-compiled libraries in the software domain, which dynamically loaded into memory during runtime. The framework is based on PYNQ, and a Yocto-based tool-flow. For the evaluation of our framework, we show the implementation of an artificial neural network. |
Year | Venue | Field |
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2018 | ARC | Computer architecture,Computer science,Parallel computing,Field-programmable gate array,Software,Overlay,Artificial neural network,Python (programming language) |
DocType | Citations | PageRank |
Conference | 0 | 0.34 |
References | Authors | |
5 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Benedikt Janßen | 1 | 13 | 3.51 |
Florian Kästner | 2 | 0 | 0.34 |
Tim Wingender | 3 | 0 | 0.34 |
Michael Hübner | 4 | 249 | 44.10 |