Paper Info
Title
Etiss-Ml: A Multi-Level Instruction Set Simulator With Rtl-Level Fault Injection Support For The Evaluation Of Cross-Layer Resiliency Techniques
Abstract
ETISS is an instruction set simulator (ISS) for Virtual Prototypes (VPs) modeled with SystemC/TEM. In this paper, we propose the extension ETISS-ML, which enables a multi-level simulation that switches between ISS-level and register transfer level (RTL) to accurately evaluate the impact of soft errors in the pipeline of a RISC processor. ETISS-ML achieves close-to-RTL-accurate fault injection simulation results with close-to-ISS simulation performance with a speed up gain up to 100x compared to RTL. For this, we propose an approach to dynamically determine the length of the RTL simulation period. The high simulation performance of ETISS-ML enables an ultra-efficient and accurate evaluation of cross-layer resiliency techniques for embedded applications, which requires running a large number of fault injections for long simulation scenarios. This is demonstrated on a case study of a Microcontroller Unit (MCU) executing a control algorithm for adaptive cruise control.
Year
Venue
Field
2018
PROCEEDINGS OF THE 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)
Computer science,Simulation,Cruise control,Instruction set simulator,Real-time computing,SystemC,Reduced instruction set computing,Microcontroller,Register-transfer level,Fault injection,Speedup
DocType
ISSN
Citations 
Conference
1530-1591
1
PageRank 
References 
Authors
0.37
0
6
Name
Order
Citations
PageRank
Daniel Müller-Gritschneder1267.53
Martin Dittrich210.37
Josef Weinzierl310.37
Eric Cheng4162.97
Subhasish Mitra53657228.90
Ulf Schlichtmann610921.56