Title
A Low-Power Clock-Less Pulse Width Modulator Architecture For Smart Imaging
Abstract
In this paper, we present a novel low-power image sensor architecture based on a clock-less serial read-out scheme. We show the operating principles of the architecture, and discuss the details of the implementation of the pixel, which is able to perform the conversion from the analog to the time domain of the light value individually. The implemented proof-of-concept device consists of 6x12 pixels and is intended to validate and characterize the new read-out scheme designed for low power applications. The pixel and the read-out scheme are particularly suitable for embedding energy harvesting circuits, even though this part is not included into the design. Thanks to the clockless serial read-out with embedded PWM interface, the sensor delivers still images at a variable frame rate, up to a maximum of more than 60 Kfps at the highest illumination, showing a dynamic range of at least 72 dB. A typical value of power consumption of the entire array is estimated about 35 nW at 1.6 V of power supply, with a figure of merit of 0.32 pW/(pixel . frame).
Year
DOI
Venue
2018
10.1166/jolpe.2018.1533
JOURNAL OF LOW POWER ELECTRONICS
Keywords
Field
DocType
Image Sensor, PWM Architecture, Self-Timed, Energy Harvesting, Low Power
Architecture,Pulse-width modulation,Electronic engineering,Engineering
Journal
Volume
Issue
ISSN
14
1
1546-1998
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Alberini Giacomo100.68
Massimo Gottardi26011.42
Nicola Massari310220.54
Roberto Passerone485571.43